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root / fw / boot / board_lowlevel.c @ 14:d3713e2e39d0

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/* ----------------------------------------------------------------------------
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 *         ATMEL Microcontroller Software Support 
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 * ----------------------------------------------------------------------------
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 * Copyright (c) 2008, Atmel Corporation
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 *
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *
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 * - Redistributions of source code must retain the above copyright notice,
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 * this list of conditions and the disclaimer below.
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 *
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 * Atmel's name may not be used to endorse or promote products derived from
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 * this software without specific prior written permission.
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 *
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 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * ----------------------------------------------------------------------------
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 */
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//------------------------------------------------------------------------------
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//         Headers
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//------------------------------------------------------------------------------
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#include "board.h"
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#include "board_memories.h"
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//------------------------------------------------------------------------------
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//         Internal definitions
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//------------------------------------------------------------------------------
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/// \internal Startup time of main oscillator (in number of slow clock ticks).
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#define BOARD_OSCOUNT           (AT91C_CKGR_OSCOUNT & (0x40 << 8))
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/// \internal USB PLL divisor value to obtain a 48MHz clock.
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#define BOARD_USBDIV            AT91C_CKGR_USBDIV_1
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/// \internal PLL frequency range.
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#define BOARD_CKGR_PLL          AT91C_CKGR_OUT_0
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/// \internal PLL startup time (in number of slow clock ticks).
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#define BOARD_PLLCOUNT          (16 << 8)
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/// \internal PLL MUL value.
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#define BOARD_MUL               (AT91C_CKGR_MUL & (72 << 16))//(AT91C_CKGR_MUL & (72 << 16))96
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/// \internal PLL DIV value.
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#define BOARD_DIV               (AT91C_CKGR_DIV & 14)//(AT91C_CKGR_DIV & 14)25
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/// \internal Master clock prescaler value.
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#define BOARD_PRESCALER         AT91C_PMC_PRES_CLK_2
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//------------------------------------------------------------------------------
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//         Internal functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// Default spurious interrupt handler. Infinite loop.
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//------------------------------------------------------------------------------
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void defaultSpuriousHandler(void)
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{
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}
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//------------------------------------------------------------------------------
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/// Default handler for fast interrupt requests. Infinite loop.
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//------------------------------------------------------------------------------
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void defaultFiqHandler(void)
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{
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    while (1);
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}
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//------------------------------------------------------------------------------
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/// Default handler for standard interrupt requests. Infinite loop.
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//------------------------------------------------------------------------------
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void defaultIrqHandler(void)
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{
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    while (1);
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}
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//------------------------------------------------------------------------------
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//         Exported functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// Performs the low-level initialization of the chip. This includes EFC, master
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/// clock, AIC & watchdog configuration, as well as memory remapping.
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//------------------------------------------------------------------------------
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void LowLevelInit(void)
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{
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    unsigned char i;
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    // Set flash wait states in the EFC
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    // 48MHz = 1 wait state
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#if defined(at91sam7s512)
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    AT91C_BASE_EFC0->EFC_FMR = AT91C_MC_FWS_1FWS;
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    AT91C_BASE_EFC1->EFC_FMR = AT91C_MC_FWS_1FWS;
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#elif defined(at91sam7s32) || defined(at91sam7s321) || defined(at91sam7s64) || defined(at91sam7s128) || defined(at91sam7s256)
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    AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS;
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#else
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    #error No chip definition ?
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#endif
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    // Initialize main oscillator
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    AT91C_BASE_PMC->PMC_MOR = BOARD_OSCOUNT | AT91C_CKGR_MOSCEN;
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    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
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    // Initialize PLL at 96MHz (96.109) and USB clock to 48MHz
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    AT91C_BASE_PMC->PMC_PLLR = BOARD_USBDIV | BOARD_CKGR_PLL | BOARD_PLLCOUNT
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                               | BOARD_MUL | BOARD_DIV;
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    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK));
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    // Wait for the master clock if it was already initialized
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    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
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    // Switch to slow clock + prescaler
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    AT91C_BASE_PMC->PMC_MCKR = BOARD_PRESCALER;
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    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
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    // Switch to fast clock + prescaler
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    AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
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    while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
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    // Initialize AIC
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    AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
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    AT91C_BASE_AIC->AIC_SVR[0] = (unsigned int) defaultFiqHandler;
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    for (i = 1; i < 31; i++) {
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        AT91C_BASE_AIC->AIC_SVR[i] = (unsigned int) defaultIrqHandler;
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    }
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    AT91C_BASE_AIC->AIC_SPU = (unsigned int) defaultSpuriousHandler;
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    // Unstack nested interrupts
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    for (i = 0; i < 8 ; i++) {
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        AT91C_BASE_AIC->AIC_EOICR = 0;
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    }
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    // Enable Debug mode
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    AT91C_BASE_AIC->AIC_DCR = AT91C_AIC_DCR_PROT;
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    // Watchdog initialization
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    AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
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    // Remap the internal SRAM at 0x0
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    BOARD_RemapRam();
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    // Disable RTT and PIT interrupts (potential problem when program A
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    // configures RTT, then program B wants to use PIT only, interrupts
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    // from the RTT will still occur since they both use AT91C_ID_SYS)
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    AT91C_BASE_RTTC->RTTC_RTMR &= (unsigned int)~(AT91C_RTTC_ALMIEN | AT91C_RTTC_RTTINCIEN);
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    AT91C_BASE_PITC->PITC_PIMR &= (unsigned int)~AT91C_PITC_PITIEN;
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}
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