SWD / JTAG Connectors and Pinout

JTAG was the traditional mechanism for debug connections for ARM7/9 parts, but with the Cortex-M family, ARM introduced the Serial Wire Debug (SWD) Interface. SWD is designed to reduce the pin count required for debug from the 5 used by JTAG (including GND) down to 3. In addition, one of the pins freed up by this can be used for Single Wire Viewing (SWV), which is a low cost tracing technology.

The SWD/SWV pins are overlaid on top of the JTAG pins as follows:

JTAG Mode SWD Mode Signal Notes
TCK SWCLK Clock into the core Use 10K-100K Ohm pull-down resistor to GND
TDI - JTAG Test Data Input Use 10K-100K Ohm pull-up resistor to VCC
TDO SWV JTAG Test Data Output / SWV trace data output -
TMS SWDIO JTAG Test Mode Select / SWD data in/out Use 10K-100K Ohm pull-up resistor to VCC

Usually, MCUs do not include pull-up or pull-down resistors on JTAG/SWD pins. Resistors should be added externally onto the board as detailed above. You may use resistors between 10K and 100K for these signals. This will prevent the signals from floating when they are not connected to anything.

Note that Cortex-M0 does not support SWV trace.

Other signals to note


  • Connect this pin to the (active low) reset input of the target MCU
  • We would strongly recommend also including RESET in addition to SWDIO, CLK and GND. For debugging some MCUs, such as NXP LPC11xx, RESET is essential.


  • Most NXP MCU's have an ISP pin which (when pulled low) can be used to cause the MCU to enter a bootloader on reset.
  • For example on LPC17xx this is P2.10 and on LPC11xx and LPC13xx it is P0.1.
  • Always ensure that you have a 10K to 100K Ohm pull up resistor on the ISP pin, otherwise you are unlikely to be able to make a successful debug connection.


  • Some devices have special pins that enable the JTAG interface. For example, on the NXP LPC2129 the signal RTCK must be driven low during RESET to enable the JTAG interface. You may want to add jumpers to your hardware to accomplish this.

Connector Pinouts

ARM has defined two debug connector pinouts that are in common use with tools, a 20 pin connector and a 16 pin connector...

20-pin 0.1" JTAG/SWD Connector Pinout

  • This connector was originally defined for connection to ARM7/9 parts over JTAG, but is still sometimes found in Cortex-M systems (for connections over JTAG or SWD).
  • Note that RTCK (Return clock) is only used on older ARM cores (ARM7TDMI and ARM9 family) before the debug was properly decoupled from the core clock domain.
  • Dimensions of the ARM JTAG connector are 1.29" x 0.722" (33mm x 18.5mm).

Switching between JTAG and SWD modes of debug

Some Cortex-M based MCUs support both SWD and JTAG, others support only SWD (such as NXP LPC11xx and LPC13xx). Where both are supported, there are special sequences defined to switch from JTAG mode (default) to SWD mode (and vice versa) that can sent to the core. This switch sequence uses TMS (SWDIO), and this line is connected for any SWD/JTAG connection

Normally where both modes are supported. However current mode can be modified by editing the launch configuration for a project.

Logic Levels

JTAG pod usually attempts to adjust logic levels based on the voltage it sees on Vtref referenced to whatever GND it has to work with. The voltage at Vtref is coming from your hardware, thus you need a good GND, shared with your target hardware.

Updated by tin over 11 years ago ยท 2 revisions