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Support #817

Support #816: Schematics recovery for analog board Keithley 2001

Схема платы A/D (Keithley 2001-162-01G)

Added by tin over 6 years ago. Updated almost 5 years ago.

Status:
Closed
Priority:
Normal
Assignee:
Target version:
-
Start date:
10/01/2013
Due date:
10/03/2013
% Done:

90%

Estimated time:
8.00 h

Description

Черновик схемы восстановлен, коммит r81.

Текущий этап:

  • перерисовать схему на чистовую.
  • разобраться в фунциальнальном назначении входов/выходов CPLD на интерфейсный порт.
  • подключить отладочный разъем Mictor на дискретные сигналы для захвата данных анализатором.

Files

Keithley_2001J _ 04a _ SLOPE GE.pdf (132 KB) Keithley_2001J _ 04a _ SLOPE GE.pdf tin, 12/29/2013 04:42 AM
Keithley_2001J _ 04B _ ZERO-CRO.pdf (94.2 KB) Keithley_2001J _ 04B _ ZERO-CRO.pdf tin, 12/29/2013 04:43 AM
zerocross_1.png (10.8 KB) zerocross_1.png Channel 1 - ZCTL1, Channel 2 - ZCTL2 tin, 12/29/2013 04:45 AM
zerocross_2.png (15.2 KB) zerocross_2.png Channel 1 - ZCTL1, Channel 2 - ZCTL2 tin, 12/29/2013 04:45 AM
zerocross_3.png (10.1 KB) zerocross_3.png Channel 1 - ZCTL1, Channel 2 - ZCTL2 tin, 12/29/2013 04:45 AM
Keithley_2001J _ 04C_ INTEGRATO.pdf (123 KB) Keithley_2001J _ 04C_ INTEGRATO.pdf Keithley 2001 ADC Integrator tin, 12/29/2013 05:35 AM
Keithley_2001J _ADC_Rev01.pdf (127 KB) Keithley_2001J _ADC_Rev01.pdf Analog section of ADC board. tin, 12/30/2013 01:38 AM
kei2001_intg_adc_fast.png (12.7 KB) kei2001_intg_adc_fast.png tin, 01/08/2014 02:40 AM
kei2001_intg_adc_hiaccuracy.png (14.6 KB) kei2001_intg_adc_hiaccuracy.png tin, 01/08/2014 02:40 AM
kei2001_intg_adc_medium.png (17.9 KB) kei2001_intg_adc_medium.png tin, 01/08/2014 02:40 AM
kei2001_intg_adc_normal_speed.png (21.7 KB) kei2001_intg_adc_normal_speed.png tin, 01/08/2014 02:40 AM
kei2001_intg_adc1.png (14 KB) kei2001_intg_adc1.png tin, 01/08/2014 02:40 AM
kei2001_intg_adc2.png (14.6 KB) kei2001_intg_adc2.png tin, 01/08/2014 02:40 AM
kei2001_intg_adc3.png (15.9 KB) kei2001_intg_adc3.png tin, 01/08/2014 02:40 AM
US4574271.pdf (1.51 MB) US4574271.pdf US Patent, integrating ADC system tin, 01/08/2014 04:43 AM
Keithley_2001J_ADC_Rev02.pdf (67 KB) Keithley_2001J_ADC_Rev02.pdf PDF export tin, 01/08/2014 06:07 PM
Keithley_2001J_ADC_Rev02.png (1.04 MB) Keithley_2001J_ADC_Rev02.png PNG export tin, 01/08/2014 06:12 PM
#1

Updated by tin over 6 years ago

  • % Done changed from 30 to 70
#2

Updated by tin over 6 years ago

  • % Done changed from 70 to 90

Added Revision H,J information, fixed connector signal names per Rev H ADC board silkscreen

#3

Updated by tin over 6 years ago

VR801 section fixed
U811 checked

#4

Updated by tin over 6 years ago

Final schematics for ADC section:

U811,U810 + precision passives
7.680MHz clock generator
74HC74 logic and associated FET gates
Gain amp?
Zero-cross comparator after intergator?

#7

Updated by tin over 6 years ago

Analog section is updated for final checks.
iZerg, please help to review attached PDF.

All works suspended now until review/feedback received.

#9

Updated by tin about 6 years ago

Added US patent covering multislope ADC.
Thanks to Neekeetos

#10

Updated by tin about 6 years ago

Rev 0.2 ADC schematics.
Clean up, redraw CPLD symbol, redraw digital signaling from registers.

#11

Updated by tin almost 5 years ago

  • Status changed from Feedback to Resolved
#12

Updated by tin almost 5 years ago

  • Status changed from Resolved to Closed

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